1. Field of the Invention
The present invention relates to a programmable logic device.
2. Description of the Related Art
Since a design of a logic circuit in a programmable logic device (PLD) can be changed by a user after the PLD is released on the market, the PLD is used in a variety of products from a prototype to a mass-produced product.
A field programmable gate array (FPGA) is a typical PLD. The FPGA includes a plurality of logic circuits, and an on state and an off state of a switch which changes a connection state of the logic circuits are controlled in accordance with data (configuration data) stored in a memory portion. Thus, a logic state of the FPGA can be changed even after its manufacture.
In recent years, as a programmable logic device in which a connection state of logic circuits can be kept even while power supply voltage is not supplied, a programmable logic device is proposed in which a non-volatile memory such as an electrically erasable programmable read-only memory (EEPROM) or a ferroelectric RAM (FeRAM) is used as a configuration memory (see Patent Document 1).